/*
 * Copyright (c) 2007-2013 Xilinx, Inc.  All rights reserved.
 *
 * Xilinx, Inc.
 * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
 * COURTESY TO YOU.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
 * ONE POSSIBLE   IMPLEMENTATION OF THIS FEATURE, APPLICATION OR
 * STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION
 * IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE
 * FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
 * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
 * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO
 * ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE
 * FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.
 *
 */

#ifndef __XEMACMAP_H_
#define __XEMACMAP_H_

#include "xparameters_ps.h"
#include "xparameters.h"


#define ZYNQMP_EMACPS_0_BASEADDR      0xFF0B0000
#define ZYNQMP_EMACPS_1_BASEADDR      0xFF0C0000
#define ZYNQMP_EMACPS_2_BASEADDR      0xFF0D0000
#define ZYNQMP_EMACPS_3_BASEADDR      0xFF0E0000

#if XPAR_XEMACPS_0_BASEADDR == ZYNQMP_EMACPS_0_BASEADDR
    #define ZYNQMP_EMACPS_0_IRQ_ID    XPAR_XEMACPS_0_INTR
#endif
#if XPAR_XEMACPS_0_BASEADDR == ZYNQMP_EMACPS_1_BASEADDR
    #define ZYNQMP_EMACPS_0_IRQ_ID    XPAR_XEMACPS_1_INTR
#endif
#if XPAR_XEMACPS_0_BASEADDR == ZYNQMP_EMACPS_2_BASEADDR
    #define ZYNQMP_EMACPS_0_IRQ_ID    XPAR_XEMACPS_2_INTR
#endif
#if XPAR_XEMACPS_0_BASEADDR == ZYNQMP_EMACPS_3_BASEADDR
    #define ZYNQMP_EMACPS_0_IRQ_ID    XPAR_XEMACPS_3_INTR
#endif
#if XPAR_XEMACPS_1_BASEADDR == ZYNQMP_EMACPS_0_BASEADDR
    #define ZYNQMP_EMACPS_1_IRQ_ID    XPAR_XEMACPS_0_INTR
#endif
#if XPAR_XEMACPS_1_BASEADDR == ZYNQMP_EMACPS_1_BASEADDR
    #define ZYNQMP_EMACPS_1_IRQ_ID    XPAR_XEMACPS_1_INTR
#endif
#if XPAR_XEMACPS_1_BASEADDR == ZYNQMP_EMACPS_2_BASEADDR
    #define ZYNQMP_EMACPS_1_IRQ_ID    XPAR_XEMACPS_2_INTR
#endif
#if XPAR_XEMACPS_1_BASEADDR == ZYNQMP_EMACPS_3_BASEADDR
    #define ZYNQMP_EMACPS_1_IRQ_ID    XPAR_XEMACPS_3_INTR
#endif
#if XPAR_XEMACPS_2_BASEADDR == ZYNQMP_EMACPS_0_BASEADDR
    #define ZYNQMP_EMACPS_2_IRQ_ID    XPAR_XEMACPS_0_INTR
#endif
#if XPAR_XEMACPS_2_BASEADDR == ZYNQMP_EMACPS_1_BASEADDR
    #define ZYNQMP_EMACPS_2_IRQ_ID    XPAR_XEMACPS_1_INTR
#endif
#if XPAR_XEMACPS_2_BASEADDR == ZYNQMP_EMACPS_2_BASEADDR
    #define ZYNQMP_EMACPS_2_IRQ_ID    XPAR_XEMACPS_2_INTR
#endif
#if XPAR_XEMACPS_2_BASEADDR == ZYNQMP_EMACPS_3_BASEADDR
    #define ZYNQMP_EMACPS_2_IRQ_ID    XPAR_XEMACPS_3_INTR
#endif
#if XPAR_XEMACPS_3_BASEADDR == ZYNQMP_EMACPS_0_BASEADDR
    #define ZYNQMP_EMACPS_3_IRQ_ID    XPAR_XEMACPS_0_INTR
#endif
#if XPAR_XEMACPS_3_BASEADDR == ZYNQMP_EMACPS_1_BASEADDR
    #define ZYNQMP_EMACPS_3_IRQ_ID    XPAR_XEMACPS_1_INTR
#endif
#if XPAR_XEMACPS_3_BASEADDR == ZYNQMP_EMACPS_2_BASEADDR
    #define ZYNQMP_EMACPS_3_IRQ_ID    XPAR_XEMACPS_2_INTR
#endif
#if XPAR_XEMACPS_3_BASEADDR == ZYNQMP_EMACPS_3_BASEADDR
    #define ZYNQMP_EMACPS_3_IRQ_ID    XPAR_XEMACPS_3_INTR
#endif

#endif /* __XEMACMAP_H_ */
